Silicon as a device platform is nearing a fundamental limitation to further advances in device miniaturization. Key issues that motivate a new material and device structure include silicon's limited carrier mobility and limits to gate control over the MOSFET (metal-oxide-semiconductor field effect transistor) channel (as measured by metrics such as subthreshold swing and leakage current) as gate lengths and gate oxide thicknesses decrease according to Moore's law.
Germanium (Ge) is an ideal material for electronic devices due to its higher carrier mobility compared to those of silicon (Si), and is also considered to be relatively compatible with modern Si CMOS processing. However, because of its 4% lattice mis-match with Si, Ge grown directly onto Si contains crystal defects, such as dislocations, which are detrimental to device performance. In addition to crystal defects, surface roughness is also an artifact of heteroepitaxy that can degrade optical device performance by causing scattering loss. Therefore, the application of Ge films and structures integrated onto Si-based chips will depend on successfully growing smooth, low defect-density Ge films directly onto Si substrates.
Two methods previously used to eliminate defects are cyclical hydrogen annealing and defect-necking. Cyclical hydrogen annealing involves growing a film of Ge on Si, then annealing it in an H2 ambient to cause the defects to concentrate at the Si/Ge interface, followed by additional Ge epitaxy. Defect-necking involves selectively growing Ge through an aperture etched through a SiO2 mask so that the defects are intercepted and terminated at the aperture walls.
Two specific devices of interest are MOSFETs and field-effect sensors (FESs).
In order to enhance the performance of MOSFET devices, the area of the channel covered by the gate relative to the channel's effective cross-section (the area through which the source-drain current flows) has been increased by shaping the channel region into three-dimensional shapes such as fins (FinFETs), beams, and wires, and covering them on two, three, or four sides by the gate electrode, thereby increasing the gate's control over the channel. However, these device structures are obtained by etching, which causes surface roughness and damage that deleteriously affects device performance. In addition, these lithographically patterned structures contain acute angles at which electrical fields can be concentrated. Removing this roughness requires oxidation and removal of the surface and/or a high temperature anneal that smoothes the surface and acute angles. For silicon, this anneal requires temperatures in excess of 1000° C., which possibly jeopardizes the microstructural integrity of the wafer and/or any devices previously fabricated thereon.
Germanium-based devices have been developed, but these are mostly planar devices, and do not incorporate annealing for adjusting the shape.
Field-effect sensors have been developed with planar and nanowire channels. As the sensors' sensitivity increases with the relative area of the channel surface that is in contact with the sensed medium, planar structures are at a disadvantage. Nanowire channels have the requisite form factor, but growing them in a controllable, massively integratable manner is highly difficult.